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Controller THJK005G-3S manufacturer will take you to understand: what are the basic functions of the controller
What are the basic functions of the controller? What is its working principle? Controller THJK005G-3S manufacturer will take you to understand this part of knowledge, you can refer to the following information.
Data buffering: The manufacturer of Controller THJK005G-3S tells you that because the speed of I/O equipment is low but the speed of CPU and memory is very high, a buffer must be set in the controller. The manufacturer of Controller THJK005G-3S tells you to use this buffer to temporarily store the data transmitted by the host at high speed during output, and then transfer the data in the buffer to the I/O device at the rate of the I/O device; When inputting, the buffer is used to temporarily store the data sent from the I/O device. After a batch of data is received, the data in the buffer is transmitted to the host at a high speed.
Error control: The manufacturer of Controller THJK005G-3S tells you that the device controller is also in charge of error detection on the data transmitted by the I/O device. If an error is found in the transmission, the error detection code is usually set and reported to the CPU, so the CPU invalidates the data transmitted this time and transmits it again. In this way, the correctness of data input can be guaranteed.
Data exchange: The manufacturer of Controller THJK005G-3S tells you that this refers to the realization of data exchange between the CPU and the controller, and between the controller and the device. For the former, through the data bus, the CPU writes data to the controller in parallel, or reads data from the controller in parallel; for the latter, the device inputs data to the controller or transmits data from the controller to the device . For this reason, the data register must be set in the controller.
Status description: The status controller that identifies and reports the device should record the status of the device for the CPU to understand. For example, only when the device is in the ready to send state, the CPU can start the controller to read data from the device. For this reason, a status register should be set up in the controller, and each bit of it is used to reflect a certain status of the device. When the CPU reads the contents of this register, it can understand the status of the device.
Receiving and identifying commands: The manufacturer of Controller THJK005G-3S tells you that the CPU can send a variety of different commands to the controller, and the device controller should be able to receive and recognize these commands. For this reason, there should be corresponding control registers in the controller to store the received commands and parameters, and to decode the received commands. For example, the disk controller can receive 15 different commands such as Read, Write, Format, etc. from the CPU, and some commands also carry parameters; accordingly, there are multiple registers and command decoders in the disk controller.
Address recognition: The manufacturer of Controller THJK005G-3S tells you that just like every unit in the memory has an address, every device in the system also has an address, and the device controller must be able to identify each unit it controls. The address of the device.